// Copyright (c) 2024，D-Robotics.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

/***************************************************************************
 * COPYRIGHT NOTICE
 * Copyright 2022 Horizon Robotics.
 * All rights reserved.
 ***************************************************************************/
#ifndef UTILITY_SENSOR_INC_OS08A20_SETTING_H_
#define UTILITY_SENSOR_INC_OS08A20_SETTING_H_

#ifdef __cplusplus
extern "C"
{
#endif

#define OS08A20_CHIP_ID_A 0x300A
#define OS08A20_CHIP_ID_B 0x300B
#define OS08A20_CHIP_ID_C 0x300C

#define OS08A20_TPG_CTRL      0x5081
#define OS08A20_STREAM_CTRL   0x0100
#define OS08A20_FMT_CTRL      0x3660
#define OS08A20_MIPI_FMT_CTRL 0x4809
#define OS08A20_EBD_LINE_NUM  0x3216
#define OS08A20_EBD_CTRL      0x3218
#define OS08A20_EBD_TAG       0x3219
#define OS08A20_EBD_CORE_REG  0x3665
#define OS08A20_GROUP_ACCESS  0x3208


static uint32_t os08a20_1080p_init_settings[] = {
        0x0100,0x00,
        DELAY_FLAG,0x0a,
        0x0103,0x01,
        DELAY_FLAG,0x2a,
        0x0303,0x02,  // PLL CTRL
        0x0304,0x00,  // PLL CTRL Default0x0
        0x0305,0x1a,  // PLL CTRL
        0x0306,0x00,  // PLL CTRL
        0x0308,0x03,  // PLL CTRL
        0x0309,0x04,  // PLL CTRL
        0x0323,0x02,  // PLL CTRL
        0x0325,0x18,  // PLL CTRL
        0x032a,0x00,  // PLL CTRL
        0x300f,0x11,  // MIPI SC default0x11
        0x3010,0x01,  // MIPI PCLK
        0x3011,0x04,  // MIPI PCLK
        0x3012,0x21,  // MIPI 2lane
        0x3016,0xf0,  // MIPI CLK Reset
        0x301e,0x98,
        0x3031,0xa9,  // BIT(3) D-PHY
        0x3103,0x92,  // SCCB SYSREG
        0x3104,0x01,  // pll clk select
        0x3106,0x10,  // not used
        0x3400,0x04,  // power save mode en
        0x3025,0x03,  // power save mode option
        0x3425,0x01,  // Streaming blanking
        0x3428,0x01,
        0x3406,0x08,  // lines * 4 to power saving
        0x3408,0x03,
        0x340c,0xff,
        0x340d,0xff,
        0x031e,0x09,
        0x3501,0x04,
        0x3502,0x62,
        0x3505,0x83,  // Gain settings
        0x3508,0x00,  // Gain settings
        0x3509,0x80,  // Gain settings
        0x350a,0x04,  // Gain settings
        0x350b,0x00,  // Gain settings
        0x350c,0x00,  // Gain settings
        0x350d,0x80,  // Gain settings
        0x350e,0x04,  // Gain settings
        0x350f,0x00,  // Gain settings
        0x3600,0x09,  // analog settings
        0x3603,0x2c,  // analog settings
        0x3605,0x50,  // analog settings
        0x3609,0xb5,  // analog settings
        0x3610,0x39,  // analog settings
        0x360c,0x01,  // analog settings
        0x3628,0xa4,  // analog settings
        0x362d,0x10,  // analog settings
        0x3660,0x43,  // analog settings raw10:0x43, raw12:0xd3.
        0x3661,0x06,  // analog settings
        0x3662,0x00,
        0x3663,0x28,
        0x3664,0x0d,
        0x366a,0x38,
        0x366b,0xa0,
        0x366d,0x00,
        0x366e,0x00,
        0x3680,0x00,  // aGain
        0x36c0,0x00,
        /* sensor timing control */
        0x3701,0x02,
        0x373b,0x02,
        0x373c,0x02,
        0x3736,0x02,
        0x3737,0x02,
        0x3705,0x00,
        0x3706,0x39,
        0x370a,0x00,
        0x370b,0x98,
        0x3709,0x49,
        0x3714,0x22,
        0x371c,0x00,
        0x371d,0x08,
        0x3740,0x1b,
        0x3741,0x04,
        0x375e,0x0b,
        0x3760,0x10,
        0x3776,0x10,
        0x3781,0x02,
        0x3782,0x04,
        0x3783,0x02,
        0x3784,0x08,
        0x3785,0x08,
        0x3788,0x01,
        0x3789,0x01,
        0x3797,0x04,
        0x3762,0x11,
        0x3800,0x00,
        0x3801,0x00,  // X start
        0x3802,0x00,
        0x3803,0x0c,  // Y start
        0x3804,0x07,
        0x3805,0x89,  // X end 3839.,
        0x3806,0x04,
        0x3807,0x47,  // Y end 2147.,
        0x3808,0x07,
        0x3809,0x80,  // X size 1920
        0x380a,0x04,
        0x380b,0x38,  // Y size 1080
        0x380c,0x80,
        0x380d,0x04,  // HTS 2052
        0x380e,0x40,
        0x380f,0x92,  // VTS 1170
        0x3813,0x08,
        0x3814,0x03,
        0x3815,0x01,
        0x3816,0x03,
        0x3817,0x01,
        0x381c,0x00,
        0x3820,0x05,
        0x3821,0x01,
        0x3823,0x08,
        0x3826,0x00,
        0x3827,0x08,
        0x382d,0x08,
        0x3832,0x02,
        0x3833,0x00,
        0x383c,0x48,
        0x383d,0xff,
        // OTP Settings
        0x3d85,0x0b,
        0x3d84,0x40,
        0x3d8c,0x63,
        0x3d8d,0xd7,
        // BLC Control
        0x4000,0xf8,
        0x4001,0x2b,
        0x4004,0x00,
        0x4005,0x40,
        0x400a,0x01,
        0x400f,0xa0,
        0x4010,0x12,
        0x4018,0x00,
        0x4008,0x02,
        0x4009,0x05,
        0x401a,0x58,
        0x4050,0x00,
        0x4051,0x01,
        0x4028,0x2f,
        0x4052,0x00,
        0x4053,0x80,
        0x4054,0x00,
        0x4055,0x80,
        0x4056,0x00,
        0x4057,0x80,
        0x4058,0x00,
        0x4059,0x80,
        0x430b,0xff, // not listed
        0x430c,0xff, // not listed
        0x430d,0x00, // not listed
        0x430e,0x00, // not listed
        // CADC Control
        0x4501,0x98,
        0x4502,0x00,
        0x4643,0x00,  // not listed
        0x4640,0x01,  // not listed
        0x4641,0x04,  // not listed
        /* MIPI Control */
        0x4800,0x04,  // Gate clock lane when there is no packet to transmit
        0x4809,0x2b,  // Data type RAW10.,
        0x4813,0x90,  // Using vc0. default val is0x90.,
        0x4817,0x04,  // YUV not en.,
        0x4833,0x18,
        0x4837,0x14,
        0x483b,0x00,
        0x484b,0x03,
        0x4850,0x7c,
        0x4852,0x06,
        0x4856,0x58,
        0x4857,0xaa,
        0x4862,0x0a,
        0x4869,0x18,
        0x486a,0xaa,
        0x486e,0x03,
        0x486f,0x55,
        0x4875,0xf0,
        // ISP Control
        0x5000,0x89,
        0x5001,0x42,
        0x5004,0x40,
        0x5005,0x00,
        0x5180,0x00,
        0x5181,0x10,
        0x580b,0x03,
        // tem sensor Control
        0x4d00,0x03,
        0x4d01,0xc9,
        0x4d02,0xbc,
        0x4d03,0xc6,
        0x4d04,0x4a,
        0x4d05,0x25,
        0x4700,0x2b,  // LVDS ctrl
        0x4e00,0x2b,  // not listed
        // 0x0303, 0x00, // PLL CTRL
        // 0x0305, 0x40, // PLL CTRL
        // 0x0323, 0x00, // PLL CTRL
        // 0x0325, 0x40, // PLL CTRL
        // 0x380c, 0x0a,
        // 0x380d, 0x04,
        // 0x380e, 0x0a,
        // 0x380f, 0x92,
};

// 3840x2160 RAW10.
static uint32_t os08a20_4k_init_settings[] = {
        0x0100,0x00,
        DELAY_FLAG,0x0a,
        0x0103,0x01,
        DELAY_FLAG,0x2a,
        0x0303,0x02, // PLL CTRL
        0x0304,0x00, // PLL CTRL Default0x0
        0x0305,0x1a, // PLL CTRL
        0x0306,0x00, // PLL CTRL
        0x0308,0x03, // PLL CTRL
        0x0309,0x04, // PLL CTRL
        0x0323,0x02, // PLL CTRL
        0x0325,0x1a, // PLL CTRL
        0x032a,0x00, // PLL CTRL
        0x300f,0x11, // MIPI SC default0x11
        0x3010,0x01, // MIPI PCLK
        0x3011,0x04, // MIPI PCLK
        0x3012,0x21, // MIPI 2lane
        0x3016,0xf0, // MIPI CLK Reset
        0x301e,0x98,
        0x3031,0xa9,  // BIT(3) D-PHY
        0x3103,0x92,  // SCCB SYSREG
        0x3104,0x01,  // pll clk select
        0x3106,0x10,  // not used
        0x3400,0x04,  // power save mode en
        0x3025,0x03,  // power save mode option
        0x3425,0x01,  // Streaming blanking
        0x3428,0x01,
        0x3406,0x08,  // lines * 4 to power saving
        0x3408,0x03,
        0x340c,0xff,
        0x340d,0xff,
        0x031e,0x09,
        0x3501,0x04,
        0x3502,0x62,
        0x3505,0x83,  // Gain settings
        0x3508,0x00,  // Gain settings
        0x3509,0x80,  // Gain settings
        0x350a,0x04,  // Gain settings
        0x350b,0x00,  // Gain settings
        0x350c,0x00,  // Gain settings
        0x350d,0x80,  // Gain settings
        0x350e,0x04,  // Gain settings
        0x350f,0x00,  // Gain settings
        0x3600,0x09,  // analog settings
        0x3603,0x2c,  // analog settings
        0x3605,0x50,  // analog settings
        0x3609,0xb5,  // analog settings
        0x3610,0x39,  // analog settings
        0x360c,0x01,  // analog settings
        0x3628,0xa4,  // analog settings
        0x362d,0x10,  // analog settings
        0x3660,0x43,  // analog settings raw10:0x43, raw12:0xd3.,
        0x3661,0x06,  // analog settings
        0x3662,0x00,
        0x3663,0x28,
        0x3664,0x0d,
        0x366a,0x38,
        0x366b,0xa0,
        0x366d,0x00,
        0x366e,0x00,
        0x3680,0x00,  // aGain
        0x36c0,0x00,
        /* sensor timing control */
        0x3701,0x02,
        0x373b,0x02,
        0x373c,0x02,
        0x3736,0x02,
        0x3737,0x02,
        0x3705,0x00,
        0x3706,0x39,
        0x370a,0x00,
        0x370b,0x98,
        0x3709,0x49,
        0x3714,0x22,
        0x371c,0x00,
        0x371d,0x08,
        0x3740,0x1b,
        0x3741,0x04,
        0x375e,0x0b,
        0x3760,0x10,
        0x3776,0x10,
        0x3781,0x02,
        0x3782,0x04,
        0x3783,0x02,
        0x3784,0x08,
        0x3785,0x08,
        0x3788,0x01,
        0x3789,0x01,
        0x3797,0x04,
        0x3762,0x11,
        0x3800,0x00,
        0x3801,0x00, // X start
        0x3802,0x00,
        0x3803,0x0c, // Y start 12.
        0x3804,0x0e,
        0x3805,0xff, // X end 3839.
        0x3806,0x08,
        0x3807,0x7b,  // Y end 2175.
        0x3808,0x0f,
        0x3809,0x00, // X size 3840
        0x380a,0x08,
        0x380b,0x70, // Y size 2160
        0x380c,0x10,
        0x380d,0x04,  // HTS
        0x380e,0x20,
        0x380f,0x92,  // VTS
        0x3813,0x10,
        0x3814,0x01,
        0x3815,0x01,
        0x3816,0x01,
        0x3817,0x01,
        0x381c,0x00,
        0x3820,0x04,
        0x3821,0x00,
        0x3823,0x08,
        0x3826,0x00,
        0x3827,0x08,
        0x382d,0x08,
        0x3832,0x02,
        0x3833,0x00,
        0x383c,0x48,
        0x383d,0xff,
        // OTP Settings
        0x3d85,0x0b,
        0x3d84,0x40,
        0x3d8c,0x63,
        0x3d8d,0xd7,
        // BLC Control
        0x4000,0xf8,
        0x4001,0x2b,
        0x4004,0x00,
        0x4005,0x40,
        0x400a,0x01,
        0x400f,0xa0,
        0x4010,0x12,
        0x4018,0x00,
        0x4008,0x02,
        0x4009,0x05,  // BLC control
        0x401a,0x58,
        0x4050,0x00,
        0x4051,0x01,
        0x4028,0x2f,
        0x4052,0x00,
        0x4053,0x80,
        0x4054,0x00,
        0x4055,0x80,
        0x4056,0x00,
        0x4057,0x80,
        0x4058,0x00,
        0x4059,0x80,
        0x430b,0xff,  // not listed
        0x430c,0xff,  // not listed
        0x430d,0x00,  // not listed
        0x430e,0x00,  // not listed
        // CADC Control
        0x4501,0x98,
        0x4502,0x00,
        0x4643,0x00,  // not listed
        0x4640,0x01,  // not listed
        0x4641,0x04,  // not listed
        /* MIPI Control */
        0x4800,0x04,  // Gate clock lane when there is no packet to transmit
        0x4809,0x2b,  // Data type RAW12.,
        0x4813,0x90,
        0x4817,0x04,  // YUV not en.,
        0x4833,0x18,
        0x4837,0x14,  // PCLK period
        0x483b,0x00,
        0x484b,0x03,
        0x4850,0x7c,
        0x4852,0x06,
        0x4856,0x58,
        0x4857,0xaa,
        0x4862,0x0a,
        0x4869,0x18,
        0x486a,0xaa,
        0x486e,0x03,
        0x486f,0x55,
        0x4875,0xf0,
        // ISP Control
        0x5000,0x89,
        0x5001,0x42,
        0x5004,0x40,
        0x5005,0x00,
        0x5180,0x00,
        0x5181,0x10,
        0x580b,0x03,
        // tem sensor Control
        0x4d00,0x03,
        0x4d01,0xc9,
        0x4d02,0xbc,
        0x4d03,0xc6,
        0x4d04,0x4a,
        0x4d05,0x25,
        0x4700,0x2b,  // LVDS ctrl
        0x4e00,0x2b,  // not listed
};

static uint32_t os08a20_dol2_settings[] = {
        0x3400,0x0,
        0x3025,0x02,
        0x3425,0x00,
        0x3428,0x00,
        0x3406,0x08,
        0x3408,0x01,

        0x3508,0x00, // long gain
        0x3509,0x80,
        0x3501,0x04, // long expo
        0x3502,0x62,

        0x350c,0x00, // short gain
        0x350d,0x80,
        0x3511,0x00, // short expo
        0x3512,0x10,

        0x3661,0x7,
        0x381c,0x8,
        0x3833,0x1,
        0x4813,0x98,
        0x486e,0x7,
};

static uint32_t grps[] = {
        0x3500,0x10,
        0x3700,0x10,
        0x3740,0x10,
};

static uint32_t os08a20_2lane_stream_on_setting[] = {
        0x0100, 0x01
};

static uint32_t os08a20_2lane_stream_off_setting[] = {
        0x0100, 0x00
};

static uint32_t os08a20_gain_lut[] = {
};

#ifdef __cplusplus
}
#endif

#endif
